March 13th 2015, Grenoble France
(collocated with DATE 2015)
Gabriela
Nicolescu, Polytechnique Montréal
Jiang Xu, Hong Kong
University of Science and Technology
Sébastien
Le Beux, Ecole Centrale de Lyon
Mahdi Nikdast, Polytechnique Montréal
Antonio La Porta, IBM, Zurich Research Laboratory
Ian O'Connor, Lyon Institute of Nanotechnology
Olivier Sentieys, INRIA - University of Rennes 1
Josè Flich, Universidad Politecnica de Valencia
Yvain Thonnart, CEA, LETI, MINATEC
John Ferguson, Mentor Graphics Corp
Sebastien Cremer, STMicroelectronics
Davide Bertozzi, University of Ferrara
Sandro Bartolini, Università di Siena
Yaoyao Ye, Huawei Technologies
Fabiano Hessel, PUCRS
08:30 Introduction to OPTICS workshop
Gabriela Nicolescu and Mahdi Nikdast
Morning Session on System Design, Architecture, Modelling,
and Applications
Chair: Sébastien Le Beux
08:40 Scalable Optical Interconnects for
Computing Systems and the Need for Electro-Optical Integration [slides]
Antonio La Porta, IBM Zurich Research Laboratory
09:15 Towards a Vertically Integrated Synthesis
Flow for Predictable Design of Wavelength-Routed Optical NoCs [slides]
Davide Bertozzi, University of Ferrara
09:35 Inter/Intra-Chip Optical Networks:
Opportunities and Challenges [slides]
Jiang Xu, Hong Kong University of Science and Technology
09:55 A Force-Directed Placement Algorithm for 3D
Optical Networks-on-Chip [slides]
Anja von Beuningen, Technische Universität München
10:15 System-Level Design Space Exploration
for SoCs Integrating Optical Networks on Chip [slides]
Fabiano Hessel, Pontifícia Universidade Católica do Rio Grande do Sul
10:35 Coffee break
11:00 Meet in the Middle: Leveraging Optical
Interconnection Opportunities in Chip Multi Processors [slides]
Sandro Bartolini, Università di Siena
11:20 Electronic vs Photonic NoCs: Should They
Compete or Collaborate? [slides]
Josè Flich, Universidad Politecnica de Valencia
11:40 Bandwidth Requirements in Manycore
Architectures: What Can 3D Bring? [slides]
Olivier Sentieys, INRIA - University of Rennes 1
12:00 Lunch
Afternoon Session on Silicon Photonics Devices, Circuits,
and Challenges
Chair: Jiang Xu
13:00 Building a Scalable Design Environment
for Silicon Photonics through PDKs [slides]
John Ferguson, Mentor Graphics
13:35 Recent Development of Si-Photonics in
300mm Fab [slides]
Sebastien Cremer, STMicroelectronics
13:55 Silicon Photonics for
Interposer [slides]
Yvain Thonnart, CEA, LETI, MINATEC
14:15 Thermal Management of Optical
Interconnects [slides]
Yaoyao Ye, Huawei Technologies
14:35 Coffee break
15:00 Parametric Exploration of Vertical
Tapered Coupler for 3D Optical Interconnection [slides]
Alberto Parini, University of Ferrara
15:20 The Last Mile? Remaining Challenges in
Optical Interconnect [slides]
Ian O'Connor, Lyon Institute of Nanotechnology
15:30 Panel discussion
Moderator:
Ian O'Connor, Lyon Institute of Nanotechnology
Panelists:
John Ferguson, Mentor Graphics
Davide Bertozzi, University of Ferrara
Olivier Sentieys, INRIA - University of Rennes 1
Antonio La Porta, IBM, Zurich Research Laboratory
Gabriela Nicolescu, Ecole Polytechnique de Montreal
Jiang Xu, Hong Kong University of Science and Technology
16:20 Concluding remarks
Sébastien Le Beux, Lyon Institute of Nanotechnology, Ecole Centrale
de Lyon